Course Description
This course continues study of conbinational and sequential digital applications. The input and output characteristics of the various common logic families and the appropriate signal conditioning techniques for on/off power interfacing are discussed. Also stressed are standard logic function blocks, digital and analog signal interfacing techniques, and memory devices.
syllabus |
Labs
Lab 0 |
Lab 1 |
Lab 2 |
Lab 4 |
Lab 5 |
Lab 6 |
Lab 7 |
Lab 8 |
Lab 9 |
Lab 10 |
Lab 11 |
Lab 12 |
Lab 13 |
Lab FF |
Multisims
Lab 1 |
Lab 2 |
Lab 4 |
Lab 5 |
Lab 6 |
Lab 7 |
Lab 8 |
Lab 9 |
Lab 10 |
Lab 11 |
Lab 12 |
Lab 13 |
Lab FF |
NAND Latch |
7 segment display |
Multisims .PNG Format
Lab 1 |
Lab 2 |
Lab 4 |
Lab 5 |
Lab 6 |
Lab 7 |
Lab 8 |
Lab 9 |
Lab 10 |
Lab 11 |
Lab 12 |
Lab 13 |
Lab FF |
NAND Latch |
7 segment display |